High speed memory test for 6502

This article has been copied from a Dr. Dobb's Journal issue, originally found here. The original article can also be found here

The code in this article has been used to create a banked RAM tester for the commander x16 that can be found at https://github.com/JimmyDansbo/ramtest/


by Jim F. Butterfield

14 Brooklyn Avenue
Toronto Ontario
Canada M4M 2X5

Received: July 1, 1977

A recent algorithm by Knaizuk and Hartmann (IEEE Transactions on Computers, April 1977) outlines an ultra-fast RAM test.

The program below is based on this algorithm, but sacrifices testing efficiency to a small degree so as to achieve program compactness and simplicity. The test will detect any single stuck-at-1 or stuck-at-0 fault in a RAM, including the memory itself, the address and data lines, and the address decoders. Its run time is dramatically short compared to most memory test programs. The speed advantage becomes more pronounced as the amount of memory tested increases.

Each 'pass' of the test follows the following pattern:

  1. Value FF is stored in every location to be tested.
  2. Value 00 is stored in every third location, giving a pattern of FF FF 00 FF FF 00 ...
  3. Memory is checked for all values

It is important to note that the above three steps must be done as three separate iterations. The above pass is performed three times, with the position of the 00 value changed each time. Then the whole thing is repeated, exchanging the FF and the 00 values.

the program given here is written for the KIM system; the indirect address pointer is positioned so that KIM will display it upon termination. For other systems, the pointer may be relocated and output as convenient. Subroutines and stack operations have been carefully avoided to allow the test to include page 1 of memory if desired. Memory is tested as a group of 'pages' rather than between any two arbitrary addresses; this is not essential but is usually convenient and helps the speed.

Address of the first and last pages to be tested should be placed in locations 0000 and 0001 respectively. The program starts at address 0002; it will halt showing a memory address on the display. This will be either the address of a fault, or (highest location tested + 1) for no fault.

MEMORY TEST	June, 1977			Jim Butterfield, 14 Brooklyn Ave.,
						Toronto, Ontario Canada M4M 2X5

0000 xx		BEGIN	xx			starting page for memory test
0001 xx		END	xx			ending page for memory test
0002 A9 00	START	LDA	#0		zero pointers..
0004 A8			TAY			into low-order
0005 85 FA		STA	POINTL		addresses
0007 85 70	BIGLP	STA	FLAG		=00 first time, =FF second
0009 A2 02		LDX	#2
000B 86 72		STX	MOD		3 tests in each major loop
000D A5 00	PASS	LDA	BEGIN		set pointer to..
000F 85 FB		STA	POINTH		..start of test area
0011 A6 01		LDX	END
0013 A5 70		LDA	FLAG
0015 49 FF		EOR	#$FF		reverse FLAG
0017 85 71		STA	FLIP		=FF first time, =00 second
0019 91 FA	CLEAR	STA	(POINTL),Y	write above value..
001B C8			INY			..into all locations
0022 B0 F5		BCS	CLEAR
		; FLIP in all locations; now change 1 in 3
0024 A6 72		LDX	MOD
0026 A5 00		LDA	BEGIN		set pointer..
0028 85 FB		STA	POINTH		..back to start
002A A5 70	FILL	LDA	FLAG		change value
002D 10 04		BPL	SKIP		skip 2 out of 3
002F A2 02		LDX	#2		restore 3-counter
0031 91 FA		STA	(POINTL),Y	change 1 out of 3
0033 C8		SKIP	INY
0034 D0 F6		BNE	TOP
0036 E6 FB		INC	POINTH		new page
0038 A5 01		LDA	END
003A C5 FB		CMP	POINTH		end of test area?
003C B0 EC		BCS	FILL		no. keep going
		; memory set up - now test it.
003E A5 00		LDA	BEGIN		set pointer..
0040 85 FB		STA	POINTH		..back to start
0042 A6 72		LDX	MOD		synchronize 3-counter
0044 A5 71	POP	LDA	FLIP		test for FLIP value..
0046 CA			DEX			..2 out of 3 times
0047 10 04		BPL	SLIP		     - else -
0049 A2 02		LDX	#2		reset 3-counter
004B A5 70		LDA	FLAG		& test for FLAG value
004D D1 FA	SLIP	CMP	(POINTL),Y	make the test
004F D0 15		BNE	OUT		branch if failed
0051 C8			INY
0052 D0 F0		BNE	POP
0056 A5 01		LDA	END
005A B0 E8		BCS	POP
		; above test OK - change & repeat
005C C6 72		DEC	MOD		change 1 in 3 position
005E 10 AD		BPL	PASS		.. & do next third
0060 A5 70		LDA	FLAG		invert flag..
0062 49 FF		EOR	#$FF		..for part 2
0064 30 A1		BMI	BIGLP
0066 84 FA	OUT	STY	POINTL		low order adds to display
0068 4C 4F 1C		JMP	START		..and exit to KIM
006B			end